Today's integrated circuits (ICs) contain many circuit elements. Computer-aided design (CAD) and computer-aided engineering (CAE) tools are essential in producing these complicated integrated circuits. Circuit design can be represented by a schematic. Schematics consist of symbol instances connected by nets which demonstrate the functional design of the circuit. Symbol instances are pictorial icons that represent a complete functional block. Symbol instances can be primitive elements, such as transistors and resistors. Symbol instances can also be abstractions of combinations of primitive elements, such as NAND gates and NOR gates. Symbol instances can also be higher level groupings of these various elements.
To produce the complicated schematics of an integrated circuit, CAD software can be used. CAD software allows symbols to be saved in software libraries for use by all circuit designers within the entire IC. Portions of the IC can be easily replicated, deleted, and changed with the CAD software.
Another representation of a circuit design is the netlist. A netlist is a text file describing a circuit. The netlist lists all of the symbol instances and their connecting nets within a schematic. CAE software can be used to translate a schematic into a netlist. In an hierarchical netlist, each of the symbol instances are defined a single time, even if the symbol instance is incorporated many times in the circuit.
A netlist is used as input to another CAE tool, the simulator. Simulators use netlists and input stimulus files to imitate the function of the circuit design without having to incorporate the design in hardware. Simulating a circuit by providing netlists and stimulus data is an efficient and cost effective method of testing a circuit.
However, the massive complexity of current circuits introduces problems in circuit design. A typical circuit may now contain several million individual instances. These instances are connected by several million nets. A change in design implementation may necessitate the same change to several thousand corresponding blocks of the circuit. A change in a net within one block may cause unknown effects on other circuit blocks. Integrated circuit manufacturing also introduces problems with circuit design. Because the manufacturing process of ICs involves so many steps on such small objects, there is a relatively high number of imperfect chips made. To salvage such chips, circuits such as DRAM (dynamic random access memory) chips are designed with a higher number of gates than are needed. For example, a 4 Meg DRAM might be designed as a 4.01 Meg DRAM so that up to one-one hundredths of the memory gates may be imperfect on any chip and the chip will still have 4 Meg of functioning memory. After production, the portions of the memory gates which suffer from imperfections must be disabled. This is accomplished by providing several corresponding nets in the circuit. For example, instead of a single power source net (commonly referred to as vcc|), multiple local vcc nets may be implemented. Then, power may be withdrawn from the local vcc nets in the affected chip areas.
These problems in the IC design raise several needs in the art. There is a need for global nets, such as vcc|, to be localized. Then such local nets can be individually managed on the manufactured chips. The implementation of these local nets needs to be convenient and efficient for the circuit designers and the simulation software packages. There is also a need to allow block changes, deletes, and additions to have a minimal amount of affect on the overall design of the circuit. Designers of blocks of ICs should be able to utilize global nets without necessarily worrying about the affect to other blocks of the chip.